oHFM

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Open Harmonized FPGA Module (oHFM) // SDT.06
The Open Harmonized FPGA Module (oHFM™) is the world’s first open standard specifically designed for FPGA and SOC-FPGA modules. It addresses the common challenges of proprietary designs and vendor lock-in by providing a unified, scalable architecture for professional FPGA development.
The Concept: One Standard, Two Flavours
The oHFM standard is built on shared principles and a common signal language, yet it respects the different physical requirements of FPGA projects. It provides two harmonized variants that are not plug-and-play interchangeable but follow the same system thinking:
- oHFM.s (Solderable): Optimized for compact, cost-efficient series production
- oHFM.c (Connector-based): Designed for high-speed performance, scalability, and easy upgrades
Whether you are shipping 100 units or 100,000, oHFM provides the professional foundation for your next FPGA project.
Key Features & Advantages
oHFM offers a range of benefits designed to streamline the lifecycle of FPGA-based products:
- Modular by Design
Scales from compact embedded systems to high-performance platforms - Vendor Neutral
Avoids vendor lock-in and works across major ecosystems - Smart Design Rules
Features harmonized signals and scalable footprints to simplify board design - Faster Time-to-Market
Uses ready-to-use building blocks and clear design rules to reduce engineering time - Built for the Long Run
Inspired by more than 14 years of SMARC Module® evolution, ensuring a stable and growing ecosystem
oHFM.s: The Solderable Standard
The solderable variant (oHFM.s) is designed for high-volume production and final products where cost and space efficiency are paramount. It features four distinct sizes to accommodate different FPGA classes:
- Size S: Designed for entry-level FPGAs
- Size M, L, and XL: Scalable footprints that adapt to increasing signal complexity
- Mechanical Stability: Excellent for harsh environments due to direct PCB soldering
- Manufacturing: Enables lean, connector-less manufacturing processes
| Module Size | Module Dimensions | Number of Contacts |
|---|---|---|
| Size-S | 30 mm x 30 mm | 332 |
| Size-M | 30 mm x 45 mm | 476 |
| Size-L | 45 mm x 45 mm | 662 |
| Size-XL | 45 mm x 60 mm | 875 |
oHFM.c: Performance Without Compromise
The connector-based variant (oHFM.c) is tailored for mid- to high-end FPGAs requiring high I/O counts and high-speed interfaces.
- High Pin Density: Offers from 332 up to 1200+ pins across different form factors
- Scalability: Multiple mechanical outlines depending on I/O and power requirements
- Versatility: Ideal for prototyping, evaluation, and in-field hardware upgrades
- Thermal Management: Built to support serious cooling concepts for power-intensive applications
| Module Variant | Module Size / Dimensions | Number of Connectors | Notes |
|---|---|---|---|
| Size-S1 | 75 mm × 50 mm | 1 | Optimized for low-end FPGA devices with minimal high-speed I/O requirements |
| Size-S | 75 mm × 50 mm | 2 | Compact module with higher I/O density. Supports up to 64 Gbps PAM4 per lane |
| Size-SE | 95 mm × 50 mm | 2 | Extended Size-S variant with 20 mm additional module length. Same connector configuration as Size-S |
| Size-M | 75 mm × 70 mm | 2 | Larger PCB area than Size-S while retaining the same connector count |
| Size-ME | 95 mm × 70 mm | 2 | Extended Size-M variant with 20 mm additional module length. Same connector configuration as Size-M |
| Size-L | 75 mm × 90 mm | 3 | Adds one connector for increased high-speed interconnect support. Supports up to 112 Gbps PAM4 per lane |
| Size-LE | 95 mm × 90 mm | 3 | Extended Size-L variant with 20 mm additional module length. Same connector configuration as Size-L |
| Size-XL | 75 mm × 120 mm | 4 | Maximum I/O density and bandwidth scalability. Supports up to 112 Gbps PAM4 per lane |
| Size-XLE | 95 mm × 120 mm | 4 | Extended Size-XL variant with 20 mm additional module length. Same connector configuration as Size-XL |
A Collaborative Industry Effort
oHFM was developed by a growing community of experts, vendors, and system architects within SGET. This standard is the result of a broad collaboration between leading silicon manufacturers, module providers, and systems integrators. It also incorporates the expertise of academic research institutions and software specialists to ensure a comprehensive, field-proven, and future-proof architecture.
If you are interested in more detailed information, we recommend downloading the specification.



