The updated SMARC module specification Rev 2.1 was released March 23, 2020. It’s fully backward compatible to Rev. 2.0 and introduces some new functions.
Changes from Rev. 2.0 to 2.1:
- Incorporated Errata 1.1 Rev. 2 (2/9/2017)
- Updated signal tables
- Added pin number
- Added power domain
- Updated content
- Added termination information
- Added details for eDP[0:1]_HPD
- Added SERDES as alternative function for PCIeC and PCIeD
- Added MDIO Interface
- Updated power domains and power sequencing
- Added two extra GPIOs
- PCIe Clock Request signals for PCIeA and PCIeB at previous locations
- Changed fill order for MIPI CSI (CSI1 first, then CSI0)
- Added CSI 2 and 3 on extra optional connector
- USB client mode defined more clearly
- Added sleep power domain
- Redefined JTAG connector